Typically, each integrated device (for example, an integrated electronic device) includes a chip of semiconductor material wherein a corresponding circuit (e.g., an electronic circuit) is integrated for implementing specific functionalities of the integrated device. In particular, a region of the chip is usually used as a substrate of the integrated device, whereas the integrated circuit is formed within at least one functional layer of the chip extending above the substrate (e.g., one or more epitaxial layers); therefore, contact terminals of the integrated circuit are typically made through suitable conductive layers on a front surface of the chip (commonly denoted as front contact terminals), so as to contact the epitaxial layer in which the integrated circuit is formed.
However, some integrated circuits also need contact terminals being formed on a rear surface of the chip (commonly denoted as rear contact terminals), so as to directly contact the substrate. This is the case, for example, for integrated circuits including MOS or BJT transistors for power applications; the latter ones, in fact, have a vertical structure in which a corresponding drain or collector terminal is contacted through the substrate. Moreover, in certain applications, integrated circuits may require rear contact terminals so as to be able to conduct away parasitic leakage currents being originated within the substrate.
In order to form such rear contact terminals, one or more metal layers are typically formed on the rear surface of the substrate, which metal layers are usually generically referred to as backside metallization.
As it is known, backside metallization, although relatively widely used, has some drawbacks that may impair an optimal operation of the corresponding integrated device.
In fact, the substrate and the backside metallization may create a semiconductor-metal junction that forms a corresponding Schottky diode; in order to make such junction ohmic and with a low contact specific resistance (or contact resistivity) (e.g., of the order of several tens of μΩ*cm2), the substrate is typically formed with a high dopant concentration (e.g., greater than 1018 cm−3); in this way, a potential barrier at the interface of the junction is reduced in thickness, thereby facilitating its crossing, via a tunnel effect, by electrical charges. However, an over-doped substrate, in addition to increasing uniformity issues in dopant concentrations between central and side portions of a wafer wherein several integrated circuits are normally formed, may also make difficult the formation of less-doped thin epitaxial layers thereon; moreover, during annealing procedures (e.g., being used to promote a proper reorganization of the reticular structure and a correct and uniform doping of the substrate), the substrate may consume the epitaxial layer above it, because of an excessive dopant concentration gradient therebetween.
For this reason, a different approach is that of making the backside metallization in a material with such chemical and physical features that allow lowering the contact specific resistance, without substantially needing to increase the dopant concentration within the substrate, assuring limited silicon consumption. However, such material may also have to meet mechanical requirements of good adhesion to the substrate and good solderability with elements external to the integrated device—for example, pins of a package thereof.
For this reason, the solutions being currently used for combining such (electrical and mechanical) requirements provide a composite structure of the backside metallization including different metal layers, each one of which is intended to meet a specific requirement.
For example, in a conventional solution, the backside metallization includes a chromium (or titanium) layer being deposited on the substrate to ensure good adhesion or low contact specific resistance, a nickel layer being deposited on the chromium layer to ensure good solderability, and a gold layer being deposited on the nickel layer for protecting the latter against external contaminations and oxidations, and for improving the solderability of solder elements during welding operations. However, a backside metallization thus implemented may have some drawbacks, mainly due to the need of recurring to trade-off values of dopant concentration within the substrate; in particular, in conditions of relatively high substrate resistivity (e.g., greater than 6 mΩ*cm, as a result of low dopant concentrations therein), the substrate-chromium layer junction has good adhesion but a high contact specific resistance, whereas in conditions of relatively low substrate resistivity (e.g., lower than 6 mΩ*cm, as a result of high dopant concentrations), the substrate-chromium layer junction has a low contact specific resistance, but a worse adhesion. Since the trade-off values being chosen for the dopant concentration within the substrate vary according to the performance to be obtained for the integrated device, different variants of the production process may have to be provided; this may imply a relevant logistic and economic effort by a manufacturer of the integrated device, which may imply an increase in the production costs thereof.
In another solution described in WO-A-2008/050251, which is incorporated by reference, the backside metallization includes a gold-silicon eutectic alloy to achieve both a low contact specific resistance and good adhesion. In particular, the eutectic alloy layer is obtained by first depositing a gold layer on the substrate, and then making an appropriate heat treatment, after which the eutectic alloy is placed between a residual gold layer (not involved in the making of the eutectic alloy) and the substrate. Moreover, the backside metallization according to such solution includes a silver layer being deposited on the residual gold layer (for preventing subsequent depositions operations from damaging the eutectic alloy layer), a nickel layer being deposited on the silver layer (for providing good solderability), and a gold (or silver) layer on the nickel layer for protecting the same. Anyway, such a type of backside metallization may involve a significant production complexity and relatively high costs.